What Is PCB Trace Width and When to Use This Calculator
Every copper trace on a PCB acts as a small resistor. Carry too much current through a trace that is too narrow and it overheats, increasing resistance, which generates more heat — a runaway loop that ends in delamination or an open circuit. Carry too little current through a trace that is too wide and you waste routing space. The right trace width sits between those two extremes, and this calculator finds it using the IPC-2221 standard formula.
Use this calculator early — during schematic review or the first pass of your layout, before committing copper. It works for power rails, motor supply lines, LED driver outputs, battery charge paths, and any net where current is high enough to matter. Signal traces (carrying milliamps) can safely use your fab's minimum width and do not need this tool.
Internal vs External Layers: The Most Important Setting
Whether your trace is on an outer copper layer or buried inside the stackup is the single biggest factor in the calculation — more influential than trace length, ambient temperature, or copper weight alone. Understanding why is essential to reading the results correctly.
External traces (top and bottom copper, labeled “External Layers in Air” in the calculator) are exposed to the ambient environment. Heat generated by I²R loss radiates from the trace surface and convects into the surrounding air. This cooling path keeps the trace temperature manageable at a given current.
Internal traces (any layer buried in the stackup) are completely surrounded by FR4 laminate. FR4 conducts heat roughly 1,000× worse than copper. Heat generated in an internal trace has nowhere to go efficiently — it stays local, raising the trace temperature much faster. For the same current and temperature rise target, IPC-2221 specifies an internal trace roughly 50–100% wider than the equivalent external trace.
Design rule: Never copy your external trace width onto an inner layer without recalculating. If you must route a high-current net internally, run the internal result from this calculator and add your usual design margin on top of that — not on top of the external value.
The IPC-2221 Formula: What the Calculator Computes
IPC-2221 derives the minimum cross-sectional area of copper required to carry a given current within an allowable temperature rise, then divides that area by your copper thickness to get the minimum trace width. The calculator then uses the trace geometry, copper resistivity (ρ = 1.7 × 10−6 Ω·cm), and your trace length to compute three additional outputs:
- Resistance (Ω) — total DC resistance of the trace at the specified operating temperature
- Voltage Drop (V) — voltage lost along the trace length (V = I × R); critical for low-voltage rails
- Power Loss (W) — heat generated in the trace (P = I2 × R); useful for thermal budget planning
These secondary outputs often matter as much as the width itself. A 3.3 V MCU supply rail that drops 150 mV across a power trace has already used 4.5% of its voltage budget before reaching the load.
Copper Thickness: Which oz/ft² Setting to Choose
Copper weight is the thickness of the copper layer, specified in ounces per square foot. Thicker copper means a wider cross-section at any given trace width, so you can carry more current in a narrower trace. Choose the copper weight that matches your PCB stackup specification:
- 0.5 oz/ft² — 0.7 mil (17.5 µm) — fine-pitch signal layers; rarely used for power
- 1 oz/ft² — 1.37 mil (34.8 µm) — standard for most commercial PCBs; the default choice
- 2 oz/ft² — 2.74 mil (69.6 µm) — power layers and high-current boards; halves trace width vs. 1 oz
- 3 oz/ft² — 4.11 mil (104 µm) — heavy copper for power electronics and thermal management
If you are unsure of your stackup, use 1 oz. Most standard 2-layer and 4-layer PCB services ship with 1 oz outer copper unless you specify otherwise.
Temperature Rise: 10°C or 20°C?
The temperature rise setting is how much hotter than ambient you allow the trace to run under full continuous load. It directly trades off against trace width — a higher allowable temperature rise lets you use a narrower trace. These are the practical guidelines:
- 10°C — use for power supplies, motor controllers, battery chargers, industrial boards, or anything safety-sensitive. Conservative, wider trace, more margin.
- 20°C — acceptable for hobby boards, low-duty-cycle rails, and non-critical applications where board area is constrained.
When in doubt, use 10°C. The difference in trace width is modest, but the added margin protects against etching tolerances, copper plating variation, and ambient temperature spikes that are hard to predict at design time.
Voltage Drop and Power Loss: When They Override Temperature Rise
The temperature-based calculation tells you the narrowest trace that won't overheat. But on long traces or low-voltage rails, voltage drop often becomes the binding constraint before temperature does.
A 1 A trace on 1 oz copper at 10°C temperature rise needs about 11 mil of width. If that trace runs 10 cm to a 3.3 V rail, its resistance is roughly 0.05 Ω and the voltage drop is 50 mV — about 1.5% of rail voltage. That is marginal but acceptable. Extend the same trace to 30 cm and the drop triples to 150 mV, pushing the rail to 3.15 V and potentially outside your MCU's operating range. In that case, you need a wider trace — not because of temperature, but because of voltage budget.
Practical rule: always enter trace length and check the voltage drop output. If it exceeds 1–2% of your supply voltage, widen the trace or shorten the routing, regardless of what the temperature-based minimum says.
Three Worked Examples
Example 1 — Sensor power rail, 1 A, 1 oz, external layer, 10°C rise
- Inputs: I = 1 A · t = 1 oz · ΔT = 10°C · layer: external
- Result: ≈ 11 mil minimum width
- Takeaway: round up to 15 mil for margin; check voltage drop if trace runs more than 5 cm
Example 2 — DC motor supply rail, 3 A, 1 oz, internal layer, 10°C rise
- Inputs: I = 3 A · t = 1 oz · ΔT = 10°C · layer: internal
- Result: ≈ 93 mil minimum width — notably wider than the external result of ≈ 46 mil
- Takeaway: route this net on an outer layer if at all possible; if forced internal, also check whether 2 oz copper cuts the required width to a manageable size
Example 3 — High-current output, 8 A, 1 oz, external layer, 10°C rise
- Inputs: I = 8 A · t = 1 oz · ΔT = 10°C · layer: external
- Result: ≈ 165 mil (≈ 4.2 mm) — a wide trace that consumes significant board area
- Takeaway: at 8 A and above, evaluate whether a copper pour or ground/power plane is a better choice than a single routed trace
Before You Send to Fab: Design Margin Rules
IPC-2221 output is a theoretical minimum under ideal conditions. Real boards have etching tolerances (±0.5–1 mil is common), copper plating variation, and thermal coupling from adjacent components. Apply these rules before finalizing your layout:
- Add 10–20% to the calculated width and round up to your routing grid — never route a power trace at the exact IPC-2221 minimum
- Check your fab's minimum trace width — most fabs enforce a 3–5 mil minimum; if the calculation says 4 mil but your fab minimum is 6 mil, use 6 mil
- Add extra margin for internal traces — because heat dissipation is poor, target 15–25% above the calculated internal minimum rather than 10%
- Review voltage drop on long traces before routing — a wide trace on a short net may still cause a voltage drop problem if the net spans the board
- Run DRC after routing — configure your CAD tool with the correct minimum width rule so automated checks catch violations before Gerber export
When to Use Pours and Planes Instead
For currents above 5–8 A, individual routed traces become impractical from a board area perspective. At 8 A on 1 oz copper, the IPC-2221 minimum width is over 4 mm — a significant obstacle in dense layouts. The alternatives:
- Copper pour: flood-fill the available area between components on a power layer; the full pour width carries current with very low resistance and excellent heat spreading
- Power plane: dedicate an inner layer to a supply rail; current distributes across the entire plane width, making impedance and temperature rise negligible
- Heavier copper: upgrading from 1 oz to 2 oz roughly halves the required trace width for the same current — useful when a plane is not feasible
- Parallel traces: two 80-mil traces in parallel carry the same current as one 160-mil trace, with more routing flexibility
Calculator Limitations
This tool gives a reliable starting point for current-carrying trace width decisions. It is not a full PCB signoff instrument. Be aware of the following limitations:
- DC current only: IPC-2221 does not account for the skin effect. At frequencies above 1 MHz, effective trace resistance increases as current crowds toward the surface. High-frequency or RF traces require impedance-controlled design, not just width calculation.
- Ideal board conditions assumed: the formula assumes standard FR4, uniform copper plating, and no interaction with adjacent traces or components. Boards with via fields, heavy copper zones, or unusual stackups may differ from the calculated result.
- No airflow model: forced-air cooling improves heat dissipation and can justify narrower external traces — the calculator assumes still air. Convection-cooled enclosures benefit from a lower temperature rise input rather than a correction factor.
- Fab constraints may override theory: always confirm the calculated width against your PCB manufacturer's minimum trace and spacing rules before finalizing. A calculated result below fab minimum must be rounded up regardless.
Related AixKit Engineering Calculators
Useful alongside trace width for complete PCB power and signal analysis:
